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| HD74AC164/HD74ACT164 Serial-In, Parallel-Out Shift Register REJ03D0253-0200Z (Previous ADE-205-373 (Z)) Rev.2.00 Jul.16.2004 Description The HD74AC164/HD74ACT164 is a high-speed 8-bit serial-in/parallel-out shift register. Serial data is entered through a 2-input AND gate synchronous with the Low-to-High transition of the clock. The device features an asynchronous Master Reset which clears the register, setting all outputs Low independent of the clock. Features * Outputs Source/Sink 24 mA * HD74ACT164 has TTL-Compatible Inputs * Ordering Information Part Name HD74AC164P HD74AC164FPEL HD74AC164RPEL HD74AC164TELL Package Type DIP-14 pin SOP-14 pin (JEITA) SOP-14 pin (JEDEC) TSSOP-14 pin Package Code Package Abbreviation Taping Abbreviation (Quantity) DP-14, -14AV FP-14DAV FP-14DNV TTP-14DV P FP RP T -- EL (2,000 pcs/reel) EL (2,500 pcs/reel) ELL (2,000 pcs/reel) Notes: 1. Please consult the sales office for the above package availability. 2. The packages with lead-free pins are distinguished from the conventional products by adding V at the end of the package code. Pin Arrangement A1 B2 Q0 3 Q1 4 Q2 5 Q3 6 GND 7 (Top view) 14 VCC 13 Q7 12 Q6 11 Q5 10 Q4 9 MR 8 CP Rev.2.00, Jul.16.2004, page 1 of 8 HD74AC164/HD74ACT164 Logic Symbol A B CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Pin Names A, B CP MR Q0 to Q7 Data Inputs Clock Pulse Input (Active Rising Edge) Master Reset Input (Active Low) Outputs Functional Description The HD74AC164/HD74ACT164 is an edge-triggered 8-bit shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (A or B); either of these inputs can be used as an active High Enable for data entry through the other inputs. An unused input must be tied High. Each Low-to-High transition on the Clock (CP) input shifts data one place to the right and enters into Q0 the logical AND of the two data inputs (A*B) that existed before the rising clock edge. A Low level on the Master Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all Q outputs Low. Mode Select Table Inputs Operating Mode Reset (Clear) Shift MR L H H H H X L L H H A X L H L H B L L L L H Q0 Outputs Q1 to Q7 L to L q0 to q6 q0 to q6 q0 to q6 q0 to q6 H L X qn : : : : High Voltage Level Low Voltage Level Immaterial Lower case letters indicate the state of the referenced input or output one setup time prior to the Low-to-High clock transition. Logic Diagram A B D CD CP MR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q D CD Q D CD Q D CD Q D CD Q D CD Q D CD Q D CD Q Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Rev.2.00, Jul.16.2004, page 2 of 8 HD74AC164/HD74ACT164 Absolute Maximum Ratings Item Supply voltage DC input diode current DC input voltage DC output diode current DC output voltage DC output source or sink current DC VCC or ground current per output pin Storage temperature Symbol VCC IIK VI IOK VO IO ICC, IGND Tstg Ratings -0.5 to 7 -20 20 -0.5 to Vcc+0.5 -50 50 -0.5 to Vcc+0.5 50 50 -65 to +150 Unit V mA mA V mA mA V mA mA C Condition VI = -0.5V VI = Vcc+0.5V VO = -0.5V VO = Vcc+0.5V Recommended Operating Conditions: HD74AC164 Item Supply voltage Input and output voltage Operating temperature Input rise and fall time (except Schmitt inputs) VIN 30% to 70% VCC Symbol VCC VI, VO Ta tr, tf Ratings 2 to 6 0 to VCC -40 to +85 8 V V C ns/V VCC = 3.0V VCC = 4.5 V VCC = 5.5 V Unit Condition DC Characteristics: HD74AC164 Item Symbol VIH Vcc (V) 3.0 4.5 5.5 VIL 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 VOL 5.5 3.0 4.5 5.5 3.0 4.5 Input leakage current Dynamic output current* IIN IOLD IOHD 5.5 5.5 5.5 5.5 min. 2.1 3.15 3.85 -- -- -- 2.9 4.4 5.4 2.58 3.94 4.94 -- -- -- -- -- -- -- -- -- Ta = 25C typ. 1.5 2.25 2.75 1.50 2.25 2.75 2.99 4.49 5.49 -- -- -- 0.002 0.001 0.001 -- -- -- -- -- -- max. -- -- -- 0.9 1.35 1.65 -- -- -- -- -- -- 0.1 0.1 0.1 0.32 0.32 0.32 0.1 -- -- Ta = -40 to +85C min. 2.1 3.15 3.85 -- -- -- 2.9 4.4 5.4 2.48 3.80 4.80 -- -- -- -- -- -- -- 86 -75 -- max. -- -- -- 0.9 1.35 1.65 -- -- -- -- -- -- 0.1 0.1 0.1 0.37 0.37 0.37 1.0 -- -- 80 A mA mA A V VOUT = 0.1 V or VCC -0.1 V Unit Condition Input Voltage V VOUT = 0.1 V or VCC -0.1 V Output voltage VOH VIN = VIL or VIH IOUT = -50 A VIN = VIL or VIH IOH = -12 mA IOH = -24 mA IOH = -24 mA VIN = VIL or VIH IOUT = 50 A VIN = VIL or VIH IOL = 12 mA IOL = 24 mA IOL = 24 mA VIN = VCC or GND VOLD = 1.1 V VOHD = 3.85 V VIN = VCC or ground Quiescent supply 5.5 -- -- 8.0 ICC current *Maximum test duration 2.0 ms, one output loaded at a time. Rev.2.00, Jul.16.2004, page 3 of 8 HD74AC164/HD74ACT164 Recommended Operating Conditions: HD74ACT164 Item Supply voltage Input and output voltage Operating temperature Input rise and fall time (except Schmitt inputs) VIN 0.8 to 2.0 V Symbol VCC VI, VO Ta tr, tf Ratings 2 to 6 0 to VCC -40 to +85 8 V V C ns/V VCC = 4.5V VCC = 5.5V Unit Condition DC Characteristics: HD74ACT164 Item Symbol VIH VIL Output voltage VOH VCC (V) 4.5 5.5 4.5 5.5 4.5 5.5 4.5 VOL 5.5 4.5 5.5 4.5 Input current ICC/input current Dynamic output current* Quiescent supply current IIN ICCT IOLD IOHD ICC 5.5 5.5 5.5 5.5 5.5 5.5 min. 2.0 2.0 -- -- 4.4 5.4 3.94 4.94 -- -- -- -- -- -- -- -- -- Ta = 25C typ. 1.5 1.5 1.5 1.5 4.49 5.49 -- -- 0.001 0.001 -- -- -- 0.6 -- -- -- max. -- -- 0.8 0.8 -- -- -- -- 0.1 0.1 0.32 0.32 0.1 -- -- -- 8.0 Ta = -40 to +85C min. 2.0 2.0 -- -- 4.4 5.4 3.80 4.80 -- -- -- -- -- -- 86 -75 -- max. -- -- 0.8 0.8 -- -- -- -- 0.1 0.1 0.37 0.37 1.0 1.5 -- -- 80 A mA mA mA A V Unit Condition Input voltage V VOUT = 0.1 V or Vcc-0.1 V VOUT = 0.1 V or Vcc-0.1 V VIN = VIL or VIH IOUT = -50 A VIN = VIL VIN = VIL or VIH IOUT = 50 A VIN = VIL VIN = VCC or GND VIN = VCC-2.1 V VOLD = 1.1 V VOHD = 3.85 V VIN = VCC or ground IOL = 24 mA IOL = 24 mA IOH = -24 mA IOH = -24 mA *Maximum test duration 2.0 ms, one output loaded at a time. AC Characteristics: HD74AC164 Ta = +25C CL = 50 pF Item Maximum clock frequency Propagation delay CP to Qn Propagation delay CP to Qn Propagation delay Symbol fmax tPLH tPHL tPHL VCC (V)*1 Min 3.3 125 5.0 3.3 5.0 3.3 5.0 3.3 150 1.0 1.0 1.0 1.0 1.0 1.0 Typ -- -- 8.5 6.5 8.5 6.5 9.5 7.5 Max -- -- 13.0 10.0 13.0 10.0 16.0 11.5 Ta = -40C to +85C CL = 50 pF Min 100 125 1.0 1.0 1.0 1.0 1.0 1.0 -- -- 13.5 10.5 14.5 10.5 18.0 13.5 Max MHz ns Unit 5.0 MR to Qn Note: 1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V Rev.2.00, Jul.16.2004, page 4 of 8 HD74AC164/HD74ACT164 AC Operating Requirements: HD74AC164 Ta = +25C CL = 50 pF Item Setup time A or B to CP Hold time CP to A or B Pulse width CP or MR Recovery time MR or CP Note: Symbol VCC (V)*1 Typ tsu 3.3 3.0 th tw trec 5.0 3.3 5.0 3.3 5.0 3.3 5.0 1. Voltage Range 3.3 is 3.3 V 0.3 V Voltage Range 5.0 is 5.0 V 0.5 V 2.0 -1.5 -1.5 2.0 2.0 0.0 0.0 Ta = -40C to +85C CL = 50 pF Unit ns Guaranteed Minimum 5.5 6.0 4.0 0.0 0.0 5.5 4.5 2.0 2.0 4.5 0.0 0.0 7.0 5.0 2.0 2.0 AC Characteristics: HD74ACT164 Ta = +25C CL = 50 pF Item Symbol VCC (V)*1 Maximum clock fmax 5.0 frequency Propagation delay tPLH 5.0 CP to Qn Propagation delay tPHL 5.0 CP to Qn Propagation delay tPHL 5.0 MR to Qn Note: 1. Voltage Range 5.0 is 5.0 V 0.5 V Min 100 1.0 1.0 1.0 Typ -- 9.0 9.0 9.5 Max -- 11.5 11.5 13.0 Ta = -40C to +85C CL = 50 pF Min 80 1.0 1.0 1.0 -- 12.5 12.5 14.5 Max MHz ns Unit AC Operating Requirements: HD74AC164 Ta = -40C to +85C Ta = +25C CL = 50 pF CL = 50 pF Typ Guaranteed Minimum 2.5 0.0 4.5 0.0 7.0 1.5 7.0 2.0 8.0 1.5 8.0 2.0 ns Item Setup time A or B to CP Hold time CP to A or B Pulse width CP or MR Recovery time MR or CP Note: Symbol VCC (V)*1 tsu th tw trec 5.0 5.0 5.0 5.0 Unit 1. Voltage Range 5.0 is 5.0 V 0.5 V Capacitance Item Input capacitance Power dissipation capacitance Symbol CIN CPD 4.5 20.0 Typ pF pF Unit VCC = 5.5 V VCC = 5.0 V Condition Rev.2.00, Jul.16.2004, page 5 of 8 HD74AC164/HD74ACT164 Package Dimensions As of January, 2003 19.20 20.32 Max 14 8 Unit: mm 1 2.39 Max 1.30 7 7.62 6.30 7.40 Max 0.51 Min 2.54 Min 5.06 Max 2.54 0.25 0.48 0.10 0.25 - 0.05 0 - 15 + 0.10 Package Code JEDEC JEITA Mass (reference value) DP-14 Conforms Conforms 0.97 g 19.20 20.32 Max 14 8 Unit: mm 1 2.39 Max 1.30 7 7.62 6.30 7.40 Max 0.51 Min 2.54 Min 5.06 Max 2.54 0.25 *0.48 0.08 *0.25 0.06 0 - 15 *NI/Pd/AU Plating Package Code JEDEC JEITA Mass (reference value) DP-14AV Conforms Conforms 0.97 g Rev.2.00, Jul.16.2004, page 6 of 8 HD74AC164/HD74ACT164 As of January, 2003 Unit: mm 10.06 10.5 Max 14 8 5.5 1 7 *0.20 0.05 2.20 Max 0.20 7.80 + 0.30 - 1.42 Max 1.15 0 - 8 0.70 0.20 1.27 *0.40 0.06 0.12 M Package Code JEDEC JEITA Mass (reference value) FP-14DAV -- Conforms 0.23 g *Ni/Pd/Au plating 0.10 0.10 0.15 As of January, 2003 Unit: mm 8.65 9.05 Max 14 8 3.95 1 1.75 Max *0.20 0.05 7 6.10 - 0.30 1.08 + 0.10 0.635 Max 0 - 8 0.11 0.14 + 0.04 - 1.27 *0.40 0.06 0.67 0.60 + 0.20 - 0.15 0.25 M Package Code JEDEC JEITA Mass (reference value) FP-14DNV Conforms Conforms 0.13 g *Ni/Pd/Au plating Rev.2.00, Jul.16.2004, page 7 of 8 HD74AC164/HD74ACT164 As of January, 2003 Unit: mm 5.00 5.30 Max 14 8 4.40 1 7 0.65 1.0 0.13 M 6.40 0.20 0.83 Max *0.15 0.05 *0.20 0.05 1.10 Max 0.10 0.07 +0.03 -0.04 0 - 8 0.50 0.10 *Ni/Pd/Au plating Package Code JEDEC JEITA Mass (reference value) TTP-14DV -- -- 0.05 g Rev.2.00, Jul.16.2004, page 8 of 8 Sales Strategic Planning Div. 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